High-performance polycrystalline-silicon nanowire thin-film transistors with location-controlled grain boundary via excimer laser crystallization

Chao Lung Wang*, I. Che Lee, Chun Yu Wu, Chia Hsin Chou, Po Yu Yang, Yu-Ting Cheng, Huang-Chung Cheng

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

17 Scopus citations

Abstract

High-performance polycrystalline-silicon (poly-Si) nanowire (NW) thin-film transistors (TFTs) are demonstrated using excimer laser crystallization to control the locations of grain boundaries two-dimensionally. Via the locally increased thickness of the amorphous-silicon (a-Si) film as the seeds, the cross-shaped grain boundary structures were produced among these thicker a-Si grids. The NW TFTs with one primary grain boundary perpendicular to the channel direction could be therefore fabricated to achieve an excellent field-effect mobility of 346 cm 2/V ̇ s and an on/off current ratio of 3 × 10 9. Furthermore, the grain-boundary-location-controlled NW TFTs also exhibited better reliability due to the control of grain boundary locations. This technology is thus promising for applications of low-temperature poly-Si TFTs in system-on-panel and 3-D integrated circuits.

Original languageEnglish
Article number6302170
Pages (from-to)1562-1564
Number of pages3
JournalIEEE Electron Device Letters
Volume33
Issue number11
DOIs
StatePublished - 21 Sep 2012

Keywords

  • Excimer laser crystallization (ELC)
  • location controlled
  • nanowire (NW)
  • polycrystalline silicon (poly-Si)

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