High-performance PMOS devices on (110)/〈111'〉 substrate/channel with multiple stressors

Howard C.H. Wang, Shih Hian Huang, Ching Wei Tsai, Hsien Hsin Lin, Tze Liang Lee, Shih Chang Chen, Carlos H. Diaz, Mong Song Liang, Jack Y.C. Sun

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Scopus citations

Abstract

A study was performed to investigate the effect of multiple stressors on CMOS devices on (110) and (100) substrates with different channel directions. For the first time, 87% Ion-Ioff improvement is achieved by utilizing SiGe-S/D and compressive contact etch stop layer (c-CESL) for PMOS devices on (110) substrate with 〈111〉 channel direction. The improvement is similar to that on conventional (100) substrate with 〈110〉 channel direction and can be explained by piezoresistive coefficients. Record PMOS device performance of Ion=900μA/μm at Ioff =100nA/um and VDD=1.0V for 40nm gate length is demonstrated.

Original languageEnglish
Title of host publication2006 International Electron Devices Meeting Technical Digest, IEDM
DOIs
StatePublished - 2006
Event2006 International Electron Devices Meeting, IEDM - San Francisco, CA, United States
Duration: 10 Dec 200613 Dec 2006

Publication series

NameTechnical Digest - International Electron Devices Meeting, IEDM
ISSN (Print)0163-1918

Conference

Conference2006 International Electron Devices Meeting, IEDM
CountryUnited States
CitySan Francisco, CA
Period10/12/0613/12/06

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    Wang, H. C. H., Huang, S. H., Tsai, C. W., Lin, H. H., Lee, T. L., Chen, S. C., Diaz, C. H., Liang, M. S., & Sun, J. Y. C. (2006). High-performance PMOS devices on (110)/〈111'〉 substrate/channel with multiple stressors. In 2006 International Electron Devices Meeting Technical Digest, IEDM [4154395] (Technical Digest - International Electron Devices Meeting, IEDM). https://doi.org/10.1109/IEDM.2006.346960