NAND flash memory is one of the most important components in modern non-volatile storage media. However, long command setup time and slow I/O interface frequency of current NAND flash device has been limiting the bandwidth of data transfer. In this paper, we propose a high-performance NAND flash controller architecture by exploiting two techniques - parallel out-of-order execution of multi-die commands and two-plane address translation. By these two techniques, the number of commands being executed in parallel can be maximized and the average execution time per command can thus be greatly reduced to achieve higher performance. The experimental results show that the proposed NAND flash controller can improve the data access performance in both read and program for at least 18% as compared to a baseline NAND flash controller.