High performance lateral bipolar transistor from a SOI CMOS process

Mansun Chan*, Samuel K H Fung, Chen-Ming Hu, Ping K. Ko

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

4 Scopus citations

Abstract

SOI technology provides several unique advantages for integrating deep-sub-micron CMOS and lateral bipolar technologies, and high performance Complementary BiCMOS process has been demonstrated. However, even though the inherent bipolar action between the drain and source junctions of a MOSFET in SOI CMOS technology allows the formation of Lateral Bipolar Transistors with minimal effort, base definition and base contact are usually very difficult. In this paper, a new bipolar device structure fabricated using a SOI CMOS process is studied. The new base contact scheme is scalable with channel width, thus giving higher performance compared with the side base contact scheme.

Original languageEnglish
Pages90-91
Number of pages2
StatePublished - 1 Dec 1995
EventProceedings of the 1995 IEEE International SOI Conference - Tucson, AZ, USA
Duration: 3 Oct 19955 Oct 1995

Conference

ConferenceProceedings of the 1995 IEEE International SOI Conference
CityTucson, AZ, USA
Period3/10/955/10/95

Fingerprint Dive into the research topics of 'High performance lateral bipolar transistor from a SOI CMOS process'. Together they form a unique fingerprint.

Cite this