High performance lateral bipolar transistor from a SOI CMOS process

SOI technology provides several unique advantages for integrating deep-sub-micron CMOS and lateral bipolar technologies, and high performance Complementary BiCMOS process has been demonstrated. However, even though the inherent bipolar action between the drain and source junctions of a MOSFET in SOI CMOS technology allows the formation of Lateral Bipolar Transistors with minimal effort, base definition and base contact are usually very difficult. In this paper, a new bipolar device structure fabricated using a SOI CMOS process is studied. The new base contact scheme is scalable with channel width, thus giving higher performance compared with the side base contact scheme.