High-performance inductors integrated on porous silicon

Kyuchul Chong*, Ya Hong Xie, Kyung Wan Yu, Daquan Huang, Mau-Chung Chang

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

48 Scopus citations


To study the substrate effect on inductor performance, several types of spiral inductors were fabricated on porous silicon (PS), p- and p+ silicon substrate, π-network analysis results show that the use of PS effectively reduces the shunt conductance and capacitance. The analysis further shows that the use of PS significantly reduces the eddy current portion of series resistance of inductor, leading to slower increase of the apparent series resistance with increasing frequency. Higher Q-factor and resonant frequency (f r) result from the reduced shunt conductance, shunt capacitance, and frequency dependence of series resistance. Inductors fabricated on PS regions are subjected to a much less stringent set of constraints than those on bulk Si substrate, allowing for much higher inductance to be achieved without severe sacrifice in Q-factor and f r. Similarly, much higher Q-factor can be obtained for reasonable inductance and fr.

Original languageEnglish
Pages (from-to)93-95
Number of pages3
JournalIEEE Electron Device Letters
Issue number2
StatePublished - 1 Feb 2005


  • Eddy current
  • On-chip inductor
  • Porous Si
  • Quality factor
  • Substrate effect

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