High k/III-V structures: Interfaces, oxides quality and down scaling

Hai Dang Trinh*, Edward Yi Chang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

In this paper, we present our studies on high k/InGaAs and high k/InSb structures, focusing on the interfaces, oxides qualities as well as down scaling the gate oxide. We indicate the free movement of Fermi level in both kinds of n- and p-InGaAs MOSCAPs. The effect of gases plasma treatments in the improvement of gate oxides as well as high k/InGaAs interface quality is also discussed. For high k/InSb structure, the effect of post deposition annealing temperatures on electrical properties of this structure is presented. Finally, we present our efforts on down scaling the equivalent oxide thickness of these structures into sub-nm size.

Original languageEnglish
Title of host publicationICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings
DOIs
StatePublished - 1 Dec 2012
Event2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2012 - Xi'an, China
Duration: 29 Oct 20121 Nov 2012

Publication series

NameICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings

Conference

Conference2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2012
CountryChina
CityXi'an
Period29/10/121/11/12

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    Trinh, H. D., & Chang, E. Y. (2012). High k/III-V structures: Interfaces, oxides quality and down scaling. In ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings [6467799] (ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings). https://doi.org/10.1109/ICSICT.2012.6467799