High efficiency 2 GHz power Si-MOSFET design under low supply voltage down to 1V

T. Ohguro*, M. Saito, E. Morifuji, K. Murakami, K. Matsuzaki, T. Yoshitomi, T. Morimoto, H. S. Momose, Y. Katsumata, H. Iwai

*Corresponding author for this work

Research output: Contribution to journalConference article

21 Scopus citations

Abstract

We have presented a design method of RF power Si-MOSFETs for low voltage and high power-added efficiency operation. It has been demonstrated that 0.2 μm gate length Co-salicided Si MOSFETs can achieve high power-added efficiency of more than 50% at 2 GHz RF operation with sufficient breakdown voltage (Vdss) by choosing optimum gate oxide thickness and N extension impurity concentration. Especially, efficiency of more than 50% was confirmed under very low supply voltage of 1.0 V, as well as higher supply voltage such as 2 and 3V. Small gate length Co salicided Si-MOSFET is a good candidate for low-voltage, high-efficiency RF power circuits for 2 GHz operation.

Original languageEnglish
Pages (from-to)83-86
Number of pages4
JournalTechnical Digest - International Electron Devices Meeting
DOIs
StatePublished - 1996
EventProceedings of the 1996 IEEE International Electron Devices Meeting - San Francisco, CA, USA
Duration: 8 Dec 199611 Dec 1996

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    Ohguro, T., Saito, M., Morifuji, E., Murakami, K., Matsuzaki, K., Yoshitomi, T., Morimoto, T., Momose, H. S., Katsumata, Y., & Iwai, H. (1996). High efficiency 2 GHz power Si-MOSFET design under low supply voltage down to 1V. Technical Digest - International Electron Devices Meeting, 83-86. https://doi.org/10.1109/IEDM.1996.553127