High-κ material sidewall with source/drain-to-gate non-overlapped structure for low standby power applications

Ming Wen Ma*, Tien-Sheng Chao, Kuo Hsing Kao, Jyun Siang Huang, Tan Fu Lei

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

Abstract

In this paper, fully depleted silicon-on-insulator (SOI) devices with source/drain extension shifts and a high-κ offset spacers were investigated in detail. The calculated results show that the source/drain extension shift can decrease off-state leakage current Ioff significantly by utilizing the extra electron barrier height in the source/drain extension shift region to reduce standby power dissipation. However, the on-state driving current Ion is also sacrificed simultaneously. To overcome this drawback, a high-κ offset spacer is used to increase the on-state driving current Ion effectively by enhancing the vertical fringing electric field which elevates the channel voltage drop and reduces series resistance.

Original languageEnglish
Pages (from-to)8656-8658
Number of pages3
JournalJapanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers
Volume45
Issue number11
DOIs
StatePublished - 15 Nov 2006

Keywords

  • Fringing electric field
  • High-κ offset spacer dielectric
  • S/D extension shift
  • Silicon-on-insulator (SOI)

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