Hierarchical techniques for symbolic analysis of large electronic circuits

Shyh-Jye Jou*, Mei Fang Perng, Chau-Chin Su, C. K. Wang

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

3 Scopus citations

Abstract

A hierarchical symbolic analyzer(SAGA2) for the analysis of electronic circuits is presented. SAGA2 analyzes lumped, linear, or linearized (small-signal) circuits in the S- and Z-domain. For large circuits, a hierarchical two-port method is used that is two to three order faster than that without using the hierarchical method. Also, the memory used is dramatically reduced.

Original languageEnglish
Pages (from-to)21-24
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume1
DOIs
StatePublished - 1 Dec 1994
EventProceedings of the 1994 IEEE International Symposium on Circuits and Systems. Part 3 (of 6) - London, England
Duration: 30 May 19942 Jun 1994

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