Hardware efficient updating technique for LZW CODEC design

Chau-Chin Su*, Chenq Fan Yen, Jang Chuang Yo

*Corresponding author for this work

Research output: Contribution to journalConference article

10 Scopus citations

Abstract

This paper presents a simple yet effective dictionary updating technique suitable for the hardware implementation of LZW. The proposed windowed second chance (WSC) updating technique partitions the dictionary into several windows to minimize the complexity. The hardware overhead is 1 bit per phrase as oppose to log2N bits for LRU updating. Our method achieves an average of 3.80 bits/char compression ratio on Corpus benchmarks, which is compatible to 3.76 of LZT with LRU updating. We implement LZW by CAM and WSC by priority encoder/decoder. Such a design is capable of compress/decompress one character per clock which makes it especially suitable for real time and on-line applications.

Original languageEnglish
Pages (from-to)2797-2800
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume4
DOIs
StatePublished - 1 Jan 1997
EventProceedings of the 1997 IEEE International Symposium on Circuits and Systems, ISCAS'97. Part 4 (of 4) - Hong Kong, Hong Kong
Duration: 9 Jun 199712 Jun 1997

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