Green transistor - A VDD scaling path for future low power ICs

Chen-Ming Hu*, Daniel Chou, Pratik Patel, Anupama Bowonder

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

68 Scopus citations

Abstract

IC power consumption is not only a package thermal issue but also a significant and fast growing part of the world electricity consumption. A new low voltage transistor could contribute greatly to the need for a new V dd scaling scenario. Green transistor (gFET) is based on tunneling and provides Ion and Ioff far superior to MOSFET at 0.2V if suitable low-Eg material is introduced into IC manufacturing.

Original languageEnglish
Title of host publication2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA
Pages14-15
Number of pages2
DOIs
StatePublished - 14 Aug 2008
Event2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA - Hsinchu, Taiwan
Duration: 21 Apr 200823 Apr 2008

Publication series

NameInternational Symposium on VLSI Technology, Systems, and Applications, Proceedings

Conference

Conference2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA
CountryTaiwan
CityHsinchu
Period21/04/0823/04/08

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