Transient cell current caused by the trapping/detrapping of grain boundary traps in the polycrystalline silicon (poly-Si) channel of a 3-D NAND cell string is comprehensively studied in this paper. This transient has a time constant of 10 μs or longer and is strongly dependent on the bias history. It is also affected by the trap distribution as revealed by TCAD simulations. Sensing offset between program verify and read results in 'pseudo' charge loss/gain that reduces the sensing margin. The posttreatment of the poly-Si channel is suggested to mitigate this effect.
- 3-D NAND flash
- cell current/threshold voltage instability
- gate-all-around (GAA)
- grain boundary trap (GBT)
- nonvolatile memory
- polycrystalline silicon channel
- program verify (PV)