New analytical models for estimating the delay time of single line and coupled interconnect for ramp input waveform are derived. The accuracy of the signal delay time and crosstalk noise voltage models for various driver resistances, loading capacitances, and input-ramping rates has also been verified by simulation program with integrated circuit emphasis (SPICE) simulation. Based on the delay and crosstalk models, interconnect optimization design can be discussed thoroughly. The proposed guaranteed-performance interconnect design method is also discussed. These models are useful for performance estimation and layout optimization in VLSI synthesis as well as process optimization in technology development.
|Number of pages||8|
|Journal||Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers|
|State||Published - 1 Dec 2001|
- Closed-form model