In this letter, a gate recessed normally OFF AlGaN/GaN MIS-HEMT with low threshold voltage hysteresis using Al 2 O 3 /AlN stack gate insulator is presented. The trapping effect of Al 2 O 3 /GaN interface was effectively reduced with the insertion of 2-nm AlN thin interfacial passivation layer grown by plasma enhanced atomic layer deposition. The device exhibits a threshold voltage of +1.5 V, with current density of 420 mA/mm, an OFF-state breakdown voltage of 600 V, and high ON/OFF drain current ratio of ∼10 9 .
- gate insulator
- gate recessed
- interfacial passivation layer (IPL)
- metal-insulator-semiconductor high electron-mobility transistor (MIS-HEMT)
- plasma enhanced atomic layer deposition (PE-ALD)
- threshold voltage hysteresis