Gate last MOSFET with air spacer and self-aligned contacts for dense memories

Jemin Park*, Chen-Ming Hu

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations

Abstract

Gate-last metal-gate/high-k technology will allow MOSFET scaling to unprecedented levels. When the gate length is small, the dominant capacitance in the MOSFET is the gate to contact-plug capacitance. This is especially so with SAC (self-aligned contact) technology popular with high density memories. This papers proposes a compact SAC gatelast air-spacer structure that yield small size, high speed , and low switching energy. The improvement over the conventional SAC device increases dramatically with scaling.

Original languageEnglish
Title of host publication2009 International Symposium on VLSI Technology, Systems, and Applications, VLSI-TSA '09
Pages105-106
Number of pages2
DOIs
StatePublished - 1 Dec 2009
Event2009 International Symposium on VLSI Technology, Systems, and Applications, VLSI-TSA '09 - Hsinchu, Taiwan
Duration: 27 Apr 200929 Apr 2009

Publication series

NameInternational Symposium on VLSI Technology, Systems, and Applications, Proceedings

Conference

Conference2009 International Symposium on VLSI Technology, Systems, and Applications, VLSI-TSA '09
CountryTaiwan
CityHsinchu
Period27/04/0929/04/09

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