Gate engineering for deep-submicron CMOS transistors

Bin Yu*, Dong Hyuk Ju, Wen Chin Lee, Nick Kepler, Tsu Jae King, Chen-Ming Hu

*Corresponding author for this work

Research output: Contribution to journalArticle

71 Scopus citations

Abstract

Gate depletion and boron penetration through thin gate oxide place directly opposing requirements on the gate engineering for advanced MOSFET's. In this paper, several important issues of deep-submicron CMOS transistor gate engineering are discussed. First, the impact of gate nitrogen implantation on the performance and reliability of deep-submicron CMOSFET's is investigated. The suppression of boron penetration is confirmed by the SIMS profiles, and is attributed mainly to the diffusion retardation effect in bulk polysilicon by the presence of nitrogen. The MOSFET I-V characteristics, MOS capacitor quasi-static C -V curves, SIMS profiles, gate sheet resistance, and oxide Qbd are compared for different nitrogen implant conditions. A nitrogen dose of 5 x 1015 cm 2 is found to be the optimum choice at an implant energy of 40 KeV in terms of the overall electrical behavior of CMOSFET's. Under optimum design, gate nitrogen implantation is found to be effective in eliminating boron penetration without degrading performance of either p+ gate p-MOSFET and n+ gate n-MOSFET. Secondly, the impact of gate microstructure on the performance of deep-submicron CMOSFET's is discussed by comparing poly and amorphous silicon gate deposition technologies. Thirdly, poly-Sii-xGex is presented as a superior alternative gate material. Higher dopant activation efficiently results in higher active dopant concentration near the gate/SiO2 interface without increasing the gross dopant concentration. This plus the lower annealing temperature suppress the dopant penetration. Phosphorus-implanted polySio.sGeo.2 gate is compared with polysilicon gate in this study.

Original languageEnglish
Pages (from-to)1253-1262
Number of pages10
JournalIEEE Transactions on Electron Devices
Volume45
Issue number6
DOIs
StatePublished - 1 Dec 1998

Keywords

  • Amorphous semiconductor
  • Boron penetration
  • Gate engineering
  • Gate-depletion effect
  • Mosfet's, semiconductor devices
  • Sige
  • Very large scale integration

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