Gate driver circuit design optimization for TFT-LCD panel manufacturing

Kuo Fu Lee, Yiming Li*, I. Hsiu Lo, Tony Chiang, Kuen Yu Huang, Tsau Hua Hsieh

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

For TFT-LCD panel manufacturing, gate driver circuit with amorphous silicon thin-film transistor (TFT-ASG circuit) plays an important role. In this paper, we propose two different ASG driver circuit topologies to improve crucial dynamic characteristics and then optimize them with circuit sizing by simulation-based evolutionary method which integrates genetic algorithm and circuit simulator on the unified optimization framework [1]. The first circuit consisting of fourteen a-Si:H TFT devices is designed for the specifications of the rise time < 1.5 μs, the fall time < 1.5 μs and the ripple voltage < 3 V with the minimization of total layout area. The second one with eight a-Si:H TFTs and two capacitors is optimized with the additional constraint that power dissipation < 2 mW. The optimized results of this study successfully meet the desired specifications and sensitivity analysis of these results shows promising characteristics which could be used for optimal manufacturing of TFT-LCD panel.

Original languageEnglish
Title of host publicationProceedings of the 2nd Asia Symposium on Quality Electronic Design, ASQED 2010
Pages13-16
Number of pages4
DOIs
StatePublished - 2010
Event2nd Asia Symposium on Quality Electronic Design, ASQED 2010 - Penang, Malaysia
Duration: 3 Aug 20104 Aug 2010

Publication series

NameProceedings of the 2nd Asia Symposium on Quality Electronic Design, ASQED 2010

Conference

Conference2nd Asia Symposium on Quality Electronic Design, ASQED 2010
CountryMalaysia
CityPenang
Period3/08/104/08/10

Keywords

  • Gate Driver Circuits
  • Genetic Algorithm
  • Simulation-Based Optimization
  • Thin-Film Transistor

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