Future semiconductor manufacturing - Challenges and opportunities

Recently, CMOS scaling has been accelerated very aggressively in both production and research levels. Already, sub-100 nm gate length CMOS LSIs are used for many applications in a huge volume and even transistor operation of 5 nm gate length CMOS was reported in a conference. However, many serious problems are expected for implementing smaller-geometry MOSFETs into large-scale integrated circuits even at the 45 nm (HP65nm) technology node. The skyrocketing increase of production costs is a serious concern and many people feel some kind of drastic evolution or even a revolution is required in order to continue several more generations towards 10 nm. In this paper, future semiconductor manufacturing challenges are described including the possible limits of scaling.