Concept of future scaling-down for RF CMOS has been investigated in terms of fT, fmax, RF noise, linearity, and matching characteristics, based on the simulation and experiments. It has been found that gate width and finger length are the key parameters especially in sub-100nm gate length generations.
|Number of pages||2|
|Journal||Digest of Technical Papers - Symposium on VLSI Technology|
|State||Published - 1999|
|Event||Proceedings of the 1999 Symposium on VLSI Technology - Kyoto, Jpn|
Duration: 14 Jun 1999 → 16 Jun 1999