TY - GEN
T1 - Future of silicon integrated circuit technology
AU - Iwai, Hiroshi
PY - 2007
Y1 - 2007
N2 - CMOS technology has been developed into the sub-100 nm range. It is expected that the nano-CMOS technology will governed the IC manufacturing for at least another couple of decades. Though there are many challenges ahead, further down-sizing the device to a few nanometers is still on the schedule of International Technology Roadmap for Semiconductors (ITRS). Several technological options for manufacturing nano-CMOS microchips have been available or will soon be available. This paper reviews the challenges of nano-CMOS downsizing and manufacturing. We shall focus on the recent progress on the key technologies for the nano-CMOS IC fabrication in the next fifteen years.
AB - CMOS technology has been developed into the sub-100 nm range. It is expected that the nano-CMOS technology will governed the IC manufacturing for at least another couple of decades. Though there are many challenges ahead, further down-sizing the device to a few nanometers is still on the schedule of International Technology Roadmap for Semiconductors (ITRS). Several technological options for manufacturing nano-CMOS microchips have been available or will soon be available. This paper reviews the challenges of nano-CMOS downsizing and manufacturing. We shall focus on the recent progress on the key technologies for the nano-CMOS IC fabrication in the next fifteen years.
UR - http://www.scopus.com/inward/record.url?scp=51549092032&partnerID=8YFLogxK
U2 - 10.1109/ICIINFS.2007.4579241
DO - 10.1109/ICIINFS.2007.4579241
M3 - Conference contribution
AN - SCOPUS:51549092032
SN - 1424411521
SN - 9781424411528
T3 - ICIIS 2007 - 2nd International Conference on Industrial and Information Systems 2007, Conference Proceedings
SP - 571
EP - 576
BT - ICIIS 2007 - 2nd International Conference on Industrial and Information Systems 2007, Conference Proceedings
Y2 - 9 August 2007 through 11 August 2007
ER -