Flicker-noise impact on scaling of mixed-signal CMOS with HfSiON

Yuri Yasuda*, Tsu Jae King Liu, Chen-Ming Hu

*Corresponding author for this work

Research output: Contribution to journalArticle

9 Scopus citations

Abstract

The flicker noise in MOSFETs with short gate lengths (L ≤ 1 μm) is severely degraded by the presence of a thick high-k gate dielectric layer. The gate length dependence of flicker noise becomes stronger with increasing high-k dielectric thickness - but only for n-FET. To explain these phenomena, a model based on excess traps at the gate edges has been developed. This model explains the flicker-noise dependence on high-k dielectric thickness and gate length and has successfully reproduced the experimental data. Based on the model, the impact of gate-length scaling is evaluated for future mixed-signal ICs using high-k gate-dielectric technology. The deployment of high-k gate dielectric adds another gate-length-scaling limit for analog devices due to the noise consideration.

Original languageEnglish
Pages (from-to)417-422
Number of pages6
JournalIEEE Transactions on Electron Devices
Volume55
Issue number1
DOIs
StatePublished - 1 Jan 2008

Keywords

  • Analog
  • Flicker noise (1/f noise)
  • Hafnium silicon oxynitride (HfSiON)
  • Mixed signal

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