FinFET with High-κ Spacers for Improved Drive Current

Angada B. Sachid, Min Cheng Chen, Chen-Ming Hu

Research output: Contribution to journalArticlepeer-review

30 Scopus citations

Abstract

We demonstrate p-channel gate-source/drain underlapped silicon FinFET with HfO2 high-κ spacer and compare it with its counterpart having SiO2 low-κ spacer. The HfO2 spacer structure reduces series resistance in the underlap regions due to the large capacitive coupling between the gate and the underlap regions. Both drain current and transconductance of p-channel FinFET are higher than those of the SiO2 spacer device by about 3× when biased in the saturation region, and about 1.6× and 2×, respectively, when biased in the linear region. Subthreshold swing and drain-induced barrier lowering are also improved by incorporating the HfO2 spacer.

Original languageEnglish
Article number7478096
Pages (from-to)835-838
Number of pages4
JournalIEEE Electron Device Letters
Volume37
Issue number7
DOIs
StatePublished - 1 Jul 2016

Keywords

  • FinFET
  • GFIBL
  • high-κ spacer
  • low-κ spacer
  • nanowire
  • underlap

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