Fault diagnosis for linear analog circuits

Jun Weir Lin*, Chung Len Lee, Chau-Chin Su, Jwu E. Chen

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

1 Scopus citations

Abstract

This paper presents a novel scheme to diagnose single and double faults for linear analog circuits. The scheme first proposes a simple transformation procedure to transform the tested linear analog circuit into a discrete signal flow graph, then constructs `diagnosing evaluators', which model the faulty components, to form a diagnosis configuration to diagnose the faults through digital simulation. This saves much computation time. Furthermore, a simple method to un-power the OP's is also proposed to differentiate equivalent faults. The scheme can diagnose faults in passive components as well as faults in OP's.

Original languageEnglish
Pages (from-to)25-30
Number of pages6
JournalProceedings of the Asian Test Symposium
DOIs
StatePublished - 1 Dec 2000
Event9th Asian Test Symposium - Taipei, Taiwan
Duration: 4 Dec 20006 Dec 2000

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