Fault diagnosis for linear analog circuits

Jun Weir Lin*, Chung Len Lee, Chau-Chin Su, Jwu E. Chen

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

7 Scopus citations

Abstract

This paper presents a novel scheme to diagnose single and double faults for linear analog circuits. The scheme first proposes a simple transformation procedure to transform the tested linear analog circuit into a discrete signal flow graph, then constructs "diagnosing evaluators," which model the faulty components, to form a diagnosis configuration to diagnose the faults through digital simulation. This saves much computation time. Furthermore, a simple method to un-power OP's is also proposed to differentiate equivalent faults. The scheme can diagnose faults in passive components as well as active faults in OP's.

Original languageEnglish
Pages (from-to)483-494
Number of pages12
JournalJournal of Electronic Testing: Theory and Applications (JETTA)
Volume17
Issue number6
DOIs
StatePublished - 1 Dec 2001

Keywords

  • Diagnosing evaluators
  • Fault diagnosis
  • Signal flow graph
  • Un-powered network

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