Fast zero block detection and early CU termination for HEVC Video Coding

Pai Tse Chiang, Tian-Sheuan Chang

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

17 Scopus citations

Abstract

This paper proposed a fast zero block detection for various transform size from 32×32 to 4×4 in the new generation of the High Efficiency Video Coding (HEVC) standard. The derivation is based on sum-of-absolute-difference (SAD) value available in the inter prediction computation. The proposed method achieves detection accuracy to 90% in average, and saves transform unit computation by 44% (QP at 22) and 65% (QP at 32) with negligible coding performance loss, when compared with that of HM4.0rc1. Additionally, this pre-skip detection could further help decide the CU inter mode efficiently with about 50% time saving.

Original languageEnglish
Title of host publication2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013
Pages1640-1643
Number of pages4
DOIs
StatePublished - 9 Sep 2013
Event2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013 - Beijing, China
Duration: 19 May 201323 May 2013

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Conference

Conference2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013
CountryChina
CityBeijing
Period19/05/1323/05/13

Fingerprint Dive into the research topics of 'Fast zero block detection and early CU termination for HEVC Video Coding'. Together they form a unique fingerprint.

Cite this