Fast thermal aware placement with accurate thermal analysis based on green function

Sean Shih Ying Liu, Ren Guo Luo, Suradeth Aroonsantidecha, Ching Yu Chin, Hung-Ming Chen

Research output: Contribution to journalArticlepeer-review

7 Scopus citations

Abstract

In this paper, we present a fast and accurate thermal aware analytical placer. A thermal model is constructed based on a Green function with discrete cosine transform (DCT) to generate full chip temperature profile. Our thermal model is tightly integrated with an analytical placer implemented based on the SimPL framework. A temperature spreading force based on the Gaussian model is proposed to reduce the maximum on-chip temperature and optimize tradeoff between total half-perimeter wirelength and on-chip maximum temperature. The temperature profile generated using our thermal model is verified by the ANSYS ICEPAK and obtains an average deviation within 3.0% with 240× speedup.

Original languageEnglish
Article number6553166
Pages (from-to)1404-1415
Number of pages12
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume22
Issue number6
DOIs
StatePublished - 1 Jan 2014

Keywords

  • Design for manufacture
  • design for quality
  • design methodology
  • electronic design automation
  • logic design
  • placement
  • temperature control
  • thermal analysis.

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