Fast SIFT design for real-time visual feature extraction

Liang Chi Chiu, Tian-Sheuan Chang, Jiun Yen Chen, Nelson Yen Chung Chang

Research output: Contribution to journalArticlepeer-review

80 Scopus citations


Visual feature extraction with scale invariant feature transform (SIFT) is widely used for object recognition. However, its real-time implementation suffers from long latency, heavy computation, and high memory storage because of its frame level computation with iterated Gaussian blur operations. Thus, this paper proposes a layer parallel SIFT (LPSIFT) with integral image, and its parallel hardware design with an on-the-fly feature extraction flow for real-time application needs. Compared with the original SIFT algorithm, the proposed approach reduces the computational amount by 90% and memory usage by 95%. The final implementation uses 580-K gate count with 90-nm CMOS technology, and offers 6000 feature points/frame for VGA images at 30 frames/s and ∼2000 feature points/frame for 1920×1080 images at 30 frames/s at the clock rate of 100 MHz.

Original languageEnglish
Article number6507640
Pages (from-to)3158-3167
Number of pages10
JournalIEEE Transactions on Image Processing
Issue number8
StatePublished - 21 Jun 2013


  • Feature extraction
  • SIFT
  • VLSI design

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