Fast rate distortion optimization with adaptive context group modeling for HEVC

Hung Cheng Chen, Tian-Sheuan Chang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

Rate distortion optimization helps decide the best coding mode and partition to improve coding efficiency, but suffers from serious data dependency and complexity that hinders an efficient hardware encoder implementation. Thus, this paper presents a hardware-friendly fast rate-distortion method and its design. For rate estimation, we propose a context group adaptive entropy based method for more precise estimation and parallel computation that is applied to both intra and inter predictions instead of intra prediction only as in previous approaches. For distortion estimation, we use the transform domain instead of spatial domain computation to save inverse discrete transform computation and image reconstruction, and reduce cost further by adopting fixed zero sub-blocks in the high frequency part for 32×32 and 16×16 blocks. The simulation results shows 1.77% BD-rate loss in average. The proposed hardware design adopts the interleaved Luma/Chroma coding schedule to improve hardware utilization. The final implementation with TSMC 40nm CMOS process can achieve real time 4K×2K@30fps encoding with 57.95K gate count while operating under 400MHz clock frequency.

Original languageEnglish
Title of host publicationIEEE International Symposium on Circuits and Systems
Subtitle of host publicationFrom Dreams to Innovation, ISCAS 2017 - Conference Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781467368520
DOIs
StatePublished - 25 Sep 2017
Event50th IEEE International Symposium on Circuits and Systems, ISCAS 2017 - Baltimore, United States
Duration: 28 May 201731 May 2017

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Conference

Conference50th IEEE International Symposium on Circuits and Systems, ISCAS 2017
CountryUnited States
CityBaltimore
Period28/05/1731/05/17

Keywords

  • hardware design
  • HEVC
  • RDO

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  • Cite this

    Chen, H. C., & Chang, T-S. (2017). Fast rate distortion optimization with adaptive context group modeling for HEVC. In IEEE International Symposium on Circuits and Systems: From Dreams to Innovation, ISCAS 2017 - Conference Proceedings [8050459] (Proceedings - IEEE International Symposium on Circuits and Systems). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCAS.2017.8050459