Fabrication of omega-gated negative capacitance finfets and SRAM

P. J. Sung, C. J. Su, D. D. Lu, S. X. Luo, K. H. Kao, J. Y. Ciou, C. Y. Jao, H. S. Hsu, C. J. Wang, T. C. Hong, T. H. Liao, C. C. Fang, Y. S. Wang, H. F. Huang, J. H. Li, Y. C. Huang, F. K. Hsueh, C. T. Wu, W. C.Y. Ma, K. P. HuangY. J. Lee*, T. S. Chao, J. Y. Li, W. F. Wu, W. K. Yeh, Y. H. Wang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

Omega-gated negative capacitance (NC) FinFETs, CMOS inverters and SRAM are fabricated and analyzed. Forming gas annealing (FGA) is performed and found to not only enhance ferroelectricity (FE) but also the NCFET electrostatics, in terms of higher \mathrm{I}-{\mathrm{ON}}, smaller hysteresis and subthreshold slop (SS). The SS is less than 60 mV/dec for both N-FinFET and P-FinFET in this work. Moreover, the CMOS inverter shows more symmetric and larger voltage gain after FGA.

Original languageEnglish
Title of host publication2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728109428
DOIs
StatePublished - Apr 2019
Event2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019 - Hsinchu, Taiwan
Duration: 22 Apr 201925 Apr 2019

Publication series

Name2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019

Conference

Conference2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019
CountryTaiwan
CityHsinchu
Period22/04/1925/04/19

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