Fabrication of amorphous Si thin-film transistors on an engineered parylene template using a direct separation process

C. C. Chiang; D. S. Wuu; Y. P. Chen; T. H. Jaw; Ray-Hua Horng

doi:10.1149/1.2805080

Fabrication of amorphous Si thin-film transistors on an engineered parylene template using a direct separation process

C. C. Chiang^*, D. S. Wuu, Y. P. Chen, T. H. Jaw, Ray-Hua Horng

^*Corresponding author for this work

Institute of Electronics

Research output: Contribution to journal › Article

Abstract

This article reports on the fabrication of flexible amorphous silicon (a-Si) thin-film transistors (TFTs) on a parylene template carried by a glass plate without any adhesive. The a-Si TFTs can be separated directly from the glass carrier after a process temperature up to 220°C. The performance of a-Si TFTs on the engineered parylene template (parylene/ SiNx /parylene) has nearly identical electrical characteristics as those of the TFTs directly on a glass substrate. After the 10 mm radius bending test for 104 times, the a-Si TFTs still exhibit good transistor behavior with the on-off current ratio exceeding 105 and electron mobility of 0.252 cm2 V s.

Original language	English
Journal	Electrochemical and Solid-State Letters
Volume	11
Issue number	1
DOIs	https://doi.org/10.1149/1.2805080
State	Published - 1 Jan 2008

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Chiang, C. C., Wuu, D. S., Chen, Y. P., Jaw, T. H., & Horng, R-H. (2008). Fabrication of amorphous Si thin-film transistors on an engineered parylene template using a direct separation process. Electrochemical and Solid-State Letters, 11(1). https://doi.org/10.1149/1.2805080

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