Using 16 Mbit flash memories, we clarified the relation between data retentivity and Si surface micro-defects just before the tunnel oxidation process. After 105 to 106 write/erase cycles, a small number of singular cells appear to have an anomalously large charge loss rate, when the Si surface defect density due to process damage exceeds 1.2×1020/cm3. This anomalous charge loss phenomenon strongly depends on the electric field in the tunnel oxide, which is caused by the stored charge in the floating gate. Thus, an accelerated data retention test can be performed by means of the electric field in the tunnel oxide, by controlling the programmed Vt to be more than 2.4 V just before the retention test (here, neutral Vt is adjusted to 0 V). By using an accelerated test, it is clarified that controlling the number of surface micro-defects is important to obtain the extended data retention characteristics. By reducing the surface micro-defects to less than 1.2×1020/cm3, the data retention reliability after 106 to 107 write/erase cycles can be guaranteed for conventional 2-level Flash memories, where programmed Vt is less than 2.4 V.
|Number of pages||5|
|Journal||Annual Proceedings - Reliability Physics (Symposium)|
|State||Published - 1 Jan 1998|
|Event||Proceedings of the 1998 36th IEEE International Reliability Physics Symposium - Reno, NV, USA|
Duration: 31 Mar 1998 → 2 Apr 1998