Improvements in data retention characteristics of a FETMOS cell which has a self-aligned double poly-Si stacked structure are discussed. The improvement results from the use of a uniform write and erase technology. Experiments show that gradual detrapping of electrons from the gate oxide to the substrate effectively suppresses data loss of the erased cell which stores positive charges in the floating gate. It is shown that a uniform write and uniform erase technology using Fowler-Nordheim tunneling current guarantees a wide cell threshold voltage window even after 106 write and erase cycles. This technology realizes a highly reliable EEPROM with extended data retention characteristics.
|Number of pages||6|
|Journal||Annual Proceedings - Reliability Physics (Symposium)|
|State||Published - 1 Dec 1990|
|Event||Twenty Eight International Reliability Physics Symposium 1990 - New Orleans, LA, USA|
Duration: 27 Mar 1990 → 29 Mar 1990