Exploration and evaluation of hybrid TFET-MOSFET monolithic 3D SRAMs considering interlayer coupling

Jian Hao Wang, Yin Nien Chen, Pin Su, Ching Te Chuang

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This paper investigates and evaluates 7T hybrid TFET-MOSFET monolithic 3D SRAM cells considering interlayer coupling for ultra-low voltage operation using TCAD mixed-mode simulations. The planar (2D) 7T hybrid TFET-MOSFET SRAM cell is shown to exhibit equal leakage, better stability and performance compared with the conventional 2D 8T MOSFET SRAM at ultra-low voltage (Vdd ≤ 0.3V). The interlayer coupling, where the front-gate of the bottom tier device alters the back gate bias of the upper tier device, and various stacking and layout arrangements are examined and exploited to improve the stability and performance of monolithic 3D SRAMs. An optimized 3D 7T hybrid SRAM design is shown to exhibit 80% write static noise margin (WSNM) improvement and 24% cell write performance improvement, whereas optimized 3D 8T MOSFET SRAM exhibits 66% WSNM improvement and 33% cell write performance improvement over the planar design. Furthermore, 3D SRAM designs are shown to reduce the SRAM cell area by nearly 40%.

Original languageEnglish
Title of host publicationIEEE Joint Conference - International Conference on IC Design and Technology, ICICDT 2016 and Solid State Systems Symposium, 4S 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509008278
DOIs
StatePublished - 10 Aug 2016
Event2016 IEEE Joint Conference on International Conference on IC Design and Technology, ICICDT 2016 and Solid State Systems Symposium, 4S 2016 - Ho Chi Minh City, Viet Nam
Duration: 27 Jun 201629 Jun 2016

Publication series

NameIEEE Joint Conference - International Conference on IC Design and Technology, ICICDT 2016 and Solid State Systems Symposium, 4S 2016

Conference

Conference2016 IEEE Joint Conference on International Conference on IC Design and Technology, ICICDT 2016 and Solid State Systems Symposium, 4S 2016
CountryViet Nam
CityHo Chi Minh City
Period27/06/1629/06/16

Keywords

  • TFET
  • hybrid
  • interlayer coupling
  • monolithic 3D

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