Experimentally effective clean process to C-V characteristic variation reduction of HKMG MOS devices

Chien Hung Chen, Yiming Li, Chieh Yang Chen, Yu Yu Chen, Sheng Chia Hsu, Wen Tsung Huang, Sheng Yuan Chu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this work, the planar HKMG MOS devices are fabricated on (100) wafer with p-substrate. To improve the samples' interface roughness between the Si/Ge film and the interface layer, three different clean treatments are considered to fabricate the MOS devices. Among processes, the experiment indicates that HF and water rinse can present hydrogen termination to bond silicon as a good passivation. The measured C-V curves and HRTEM of the fabricated samples show the interface roughness is improved significantly. The extracted shift of flat band voltage (ΔVfb) and density of interface traps (D it) have around 50% improvement.

Original languageEnglish
Title of host publication2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013
Pages1168-1171
Number of pages4
DOIs
StatePublished - 2013
Event2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013 - Beijing, China
Duration: 5 Aug 20138 Aug 2013

Publication series

NameProceedings of the IEEE Conference on Nanotechnology
ISSN (Print)1944-9399
ISSN (Electronic)1944-9380

Conference

Conference2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013
CountryChina
CityBeijing
Period5/08/138/08/13

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