Experimental study on carrier transport mechanism in ultrathin-body SOI n- and p-MOSFETs with SOI thickness less than 5 nm

Ken Uchida*, Watanabe Hiroshi, Atsuhiro Kinoshita, Junji Koga, Toshinori Numata, Shin Ichi Takagi

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

249 Scopus citations

Abstract

The electrical characteristics of ultrathin-body SOI CMOSFETs with SOI thickness ranging from 2.3 nm to 8 nm are intensively investigated. As a result, it is demonstrated, for the first time, that electron mobility increases as SOI thickness decreases, when SOI thickness is in the range from 3.5 nm to 4.5 nm. In addition, it is demonstrated that, when SOI thickness is thinner than 4 nm, slight (even atomic-level) SOI thickness fluctuations have a significant impact on threshold voltage, gate-channel capacitance, and carrier mobility of ultrathin-body CMOSFETs.

Original languageEnglish
Pages (from-to)47-50
Number of pages4
JournalTechnical Digest - International Electron Devices Meeting
DOIs
StatePublished - 1 Dec 2002
Event2002 IEEE International Devices Meeting (IEDM) - San Francisco, CA, United States
Duration: 8 Dec 200211 Dec 2002

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