The random dopant fluctuation is one of the most important issues for sub-50nm CMOS technologies in terms of the device architecture and manufacturing. This paper will demonstrate the methodology to understand the dopant fluctuation via a purely experimental approach. It will be demonstrated in advanced bulk-trigate devices. The discrete dopant distribution along the channel direction can be determined. Boron clustering effect in nMOSFETs can be reasonably explained which results in a larger Vth variation, in comparison to that of pMOSFETs. Moreover, experiments have been extended to the advanced bulk-trigate CMOS devices. The sidewall roughness effect in trigate has also been studied. This approach provides a direct-observation of the random dopant fluctuation (RDF) and is useful for the gate oxide quality monitoring of future generation trigate devices.