Experimental and analytical studies on CMOS scaling in deep submicron regime including quantum and polysilicon gate depletion effects

Kai Chen; Chen-Ming Hu; Peng Fang; Ashawant Gupta; Ming Ren Lim; Don Wollesen

doi:10.1109/DRC.1997.612459

Experimental and analytical studies on CMOS scaling in deep submicron regime including quantum and polysilicon gate depletion effects

Kai Chen^*, Chen-Ming Hu, Peng Fang, Ashawant Gupta, Ming Ren Lim, Don Wollesen

^*Corresponding author for this work

International College of Semiconductor Technology

Research output: Contribution to conference › Paper › peer-review

Abstract

MOSFETs and CMOS ring oscillators with gate oxide down to 2.5 nm and channel length down to 0.2 μm were investigated at voltages from 1.5 V to 3.3 V to confirm predictions made using analytical models as well as to study the scaling effects. Investigations made on the fabricated MOSFETs and ring oscillators confirms that CMOS in deep submicron regimes can be accurately modeled and predicted based from the electrical oxide thickness and universal mobility models.

Original language	English
Pages	20-21
Number of pages	2
DOIs	https://doi.org/10.1109/DRC.1997.612459
State	Published - 1 Jan 1997
Event	Proceedings of the 1997 55th Annual Device Research Conference - Fort Collins, CO, USA Duration: 23 Jun 1997 → 25 Jun 1997

Conference

Conference	Proceedings of the 1997 55th Annual Device Research Conference
City	Fort Collins, CO, USA
Period	23/06/97 → 25/06/97

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10.1109/DRC.1997.612459

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@conference{3cd742dc31f6460f8b7b523df1c5a9d8,

title = "Experimental and analytical studies on CMOS scaling in deep submicron regime including quantum and polysilicon gate depletion effects",

abstract = "MOSFETs and CMOS ring oscillators with gate oxide down to 2.5 nm and channel length down to 0.2 μm were investigated at voltages from 1.5 V to 3.3 V to confirm predictions made using analytical models as well as to study the scaling effects. Investigations made on the fabricated MOSFETs and ring oscillators confirms that CMOS in deep submicron regimes can be accurately modeled and predicted based from the electrical oxide thickness and universal mobility models.",

author = "Kai Chen and Chen-Ming Hu and Peng Fang and Ashawant Gupta and Lim, {Ming Ren} and Don Wollesen",

year = "1997",

month = jan,

day = "1",

doi = "10.1109/DRC.1997.612459",

language = "English",

pages = "20--21",

note = "null ; Conference date: 23-06-1997 Through 25-06-1997",

}

Chen, K, Hu, C-M, Fang, P, Gupta, A, Lim, MR & Wollesen, D 1997, 'Experimental and analytical studies on CMOS scaling in deep submicron regime including quantum and polysilicon gate depletion effects', Paper presented at Proceedings of the 1997 55th Annual Device Research Conference, Fort Collins, CO, USA, 23/06/97 - 25/06/97 pp. 20-21. https://doi.org/10.1109/DRC.1997.612459

Experimental and analytical studies on CMOS scaling in deep submicron regime including quantum and polysilicon gate depletion effects. / Chen, Kai; Hu, Chen-Ming; Fang, Peng; Gupta, Ashawant; Lim, Ming Ren; Wollesen, Don.

1997. 20-21 Paper presented at Proceedings of the 1997 55th Annual Device Research Conference, Fort Collins, CO, USA, .

Research output: Contribution to conference › Paper › peer-review

TY - CONF

T1 - Experimental and analytical studies on CMOS scaling in deep submicron regime including quantum and polysilicon gate depletion effects

AU - Chen, Kai

AU - Hu, Chen-Ming

AU - Fang, Peng

AU - Gupta, Ashawant

AU - Lim, Ming Ren

AU - Wollesen, Don

PY - 1997/1/1

Y1 - 1997/1/1

N2 - MOSFETs and CMOS ring oscillators with gate oxide down to 2.5 nm and channel length down to 0.2 μm were investigated at voltages from 1.5 V to 3.3 V to confirm predictions made using analytical models as well as to study the scaling effects. Investigations made on the fabricated MOSFETs and ring oscillators confirms that CMOS in deep submicron regimes can be accurately modeled and predicted based from the electrical oxide thickness and universal mobility models.

AB - MOSFETs and CMOS ring oscillators with gate oxide down to 2.5 nm and channel length down to 0.2 μm were investigated at voltages from 1.5 V to 3.3 V to confirm predictions made using analytical models as well as to study the scaling effects. Investigations made on the fabricated MOSFETs and ring oscillators confirms that CMOS in deep submicron regimes can be accurately modeled and predicted based from the electrical oxide thickness and universal mobility models.

UR - http://www.scopus.com/inward/record.url?scp=0030682648&partnerID=8YFLogxK

U2 - 10.1109/DRC.1997.612459

DO - 10.1109/DRC.1997.612459

M3 - Paper

AN - SCOPUS:0030682648

SP - 20

EP - 21

Y2 - 23 June 1997 through 25 June 1997

ER -

Experimental and analytical studies on CMOS scaling in deep submicron regime including quantum and polysilicon gate depletion effects

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