Experimental 27 ns 1 Mb CMOS high-speed DRAM

S. Dhong*, W. Henkels, N. Lu, R. Scheuerlein, G. Bronner, K. Kitamura, Y. Katayama, H. Niijima, T. Kirihata, R. Franch, Wei Hwang, M. Nishiwaki, F. Pesavento, T. Rajeevakumar, Y. Sakaue, Y. Suzuki, E. Yano

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

2 Scopus citations

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Engineering & Materials Science