Evaluation on board-level noise filter networks to suppress transient-induced latchup in CMOS ICs under system-level ESD test

Ming-Dou Ker*, Sheng Fu Hsu

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

17 Scopus citations

Abstract

Different types of board-level noise filter networks are evaluated to find their effectiveness for improving the immunity of CMOS ICs against the transient-induced latchup (TLU) under the system-level electrostatic discharge (ESD) test. By choosing proper components in each noise filter network, the TLU immunity of CMOS ICs can be greatly improved. All the experimental evaluations have been verified with the silicon-controlled rectifier (SCR) test structures and the ring oscillator circuit fabricated in a 0.25-μm CMOS technology. Some board-level solutions can be further integrated into the chip design to effectively improve the TLU immunity of CMOS IC products.

Original languageEnglish
Pages (from-to)161-171
Number of pages11
JournalIEEE Transactions on Electromagnetic Compatibility
Volume48
Issue number1
DOIs
StatePublished - 1 Feb 2006

Keywords

  • Board-level noise filter
  • Latchup
  • SCR
  • System-level ESD test
  • Transient-induced latchup (TLU)

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