Evaluation of NC-FinFET based subsystem-level logic circuits using SPICE simulation

Wei Xiang You, Pin Su, Chen-Ming Hu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

This work examines the metal-ferroelectric-insulator-semiconductor (MFIS) negative-capacitance FinFET (NC-FinFET) based VLSI subsystem-level logic circuits. With the aid of a short-channel NC-FinFET compact model, we confirm the functionality and determine the standby-power/switching-energy/delay performance of logic circuits (5-stage inverter and 4-bit Manchester carry-chain (MCC) adder) employing 14nm ULP NC-FinFETs versus FinFETs. We show that the inverse Vds-dependency of threshold voltage (VT), also known as the negative DIBL, of NCFET is not only acceptable but also beneficial for the speed performance of both the static and pass-transistor logic (PTL) circuits, especially for the PTL at low VDD.

Original languageEnglish
Title of host publication2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781538676264
DOIs
StatePublished - 11 Feb 2019
Event2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018 - Burlingame, United States
Duration: 15 Oct 201818 Oct 2018

Publication series

Name2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018

Conference

Conference2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018
CountryUnited States
CityBurlingame
Period15/10/1818/10/18

Keywords

  • Dynamic adder
  • FinFET
  • Landau-Khalatnikov (L-K) equation
  • Logic circuits
  • MFIS-type NCFET
  • Negative-capacitance field-effect transistor (NCFET)
  • PTL

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    You, W. X., Su, P., & Hu, C-M. (2019). Evaluation of NC-FinFET based subsystem-level logic circuits using SPICE simulation. In 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018 [8640175] (2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/S3S.2018.8640175