Evaluation of an InAs HEMT with source-connected field plate for high-speed and low-power logic applications

Jing Neng Yao, Yueh Chin Lin, Min Song Lin, Ting Jui Huang, Heng-Tung Hsu, Simon M. Sze, Edward Yi Chang*

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

Abstract

In this study, we have presented a source-connected field plate (SCFP) InAs high electron mobility transistor (HEMT) and evaluated its potential for using in high-speed and low-power logic applications. The fabricated device demonstrated good electrical characteristics including low subthreshold swing (SS) of 76 mV/decade, drain induced barrier lowering (DIBL) of 44 mV/V, ION/IOFF ratio of 2.4 × 104, an off-state gate leakage current of less than 5 × 10−6 A/mm and a Gm, max of 1100 mS/mm at VDS = 0.5 V. When increasing the drain-source bias (VDS) to 1.0 V, the Gm, max increased to 1750 mS/mm with a cut-off frequency of 113 GHz. These results revealed that the fabrication of source-connected field plate InAs HEMTs achieved excellent device performance for high-speed and low-power logic applications.

Original languageEnglish
Pages (from-to)55-60
Number of pages6
JournalSolid-State Electronics
Volume157
DOIs
StatePublished - 1 Jul 2019

Keywords

  • Field plate
  • HEMT
  • InAs
  • Low power

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