ESD test methods on integrated circuits: An overview

Ming-Dou Ker*, Jeng Jie Peng, Hsin Chin Jiang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

33 Scopus citations

Abstract

ESD phenomenon has become a serious problem for IC products fabricated by deep-submicron CMOS technologies. To qualify the ESD immunity of IC products, there are some test methods and standards developed by some organizations, which are ESDA, AEC, EINJEDEC, and MIL-STD organizations. ESD events have been classified into 4 models, which are HBM, MM, CDM, and SDM. Besides, there are 4 modes of pin combinations for ESD zapping on the IC pins, which are specified as (1) Pin-to-VSS, (2) Pin-to-VDD, (3) Pin-to-Pin, and (4) VDD-to-VSS. All the test methods are designed to evaluate the ESD immunity of IC products. The zap number, zap interval, and sample size are all well defined in the related industrial standards. This paper provides an overview among ESD test methods on IC products. In general, the commercial IC products are requested to sustain at least 2-kV HBM, 200-V MM, and 1-kV CDM ESD stresses.

Original languageEnglish
Title of host publicationICECS 2001 - 8th IEEE International Conference on Electronics, Circuits and Systems
Pages1011-1014
Number of pages4
DOIs
StatePublished - 1 Dec 2001
Event8th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2001 - , Malta
Duration: 2 Sep 20015 Sep 2001

Publication series

NameProceedings of the IEEE International Conference on Electronics, Circuits, and Systems
Volume2

Conference

Conference8th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2001
CountryMalta
Period2/09/015/09/01

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    Ker, M-D., Peng, J. J., & Jiang, H. C. (2001). ESD test methods on integrated circuits: An overview. In ICECS 2001 - 8th IEEE International Conference on Electronics, Circuits and Systems (pp. 1011-1014). [957647] (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems; Vol. 2). https://doi.org/10.1109/ICECS.2001.957647