ESD protection design of high-linearity SPDT CMOS T/R switch for cellular applications

Tao Yi Hung, Ming-Dou Ker

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Electrostatic discharge (ESD) protection design for high-linearity single-pole double-throw (SPDT) transmit/receive switch (T/R switch) at 0.9/1.8 GHz GSM band was proposed and verified in a standard 0.18-µm CMOS process. The SPDT CMOS T/R switch was implemented with body-floating technique, multi-stacked structure, and series-shunt topology to obtain low insertion loss, high power handling capability, and good isolation. With the proposed ESD protection design, the T/R switch can sustain human-body-model (HBM) ESD voltages of 3.5 kV under the positive-to-VSS stress and 5 kV under the negative-to-VSS stress. Experimental results including ESD characteristics, RF performance, and failure analysis are presented.

Original languageEnglish
Title of host publication2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728103976
DOIs
StatePublished - 1 Jan 2019
Event2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Sapporo, Japan
Duration: 26 May 201929 May 2019

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume2019-May
ISSN (Print)0271-4310

Conference

Conference2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019
CountryJapan
CitySapporo
Period26/05/1929/05/19

Keywords

  • ESD protection design
  • High-linearity switch
  • Power-rail ESD clamp circuit
  • SPDT
  • T/R switch
  • Transient detection circuit

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