ESD protection design for giga-Hz RF CMOS LNA with novel impedance-isolation technique

Ming-Dou Ker, Chien Ming Lee

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

6 Scopus citations

Abstract

A novel ESD protection design with impedance-isolation technique is proposed and successfully verified in a 0.25-μm CMOS process with top thick metal. Its purpose is to reduce the detrimental effect of the on-chip ESD protection circuit on the power gain and noise figure of an RF LNA circuit. With the resonance of LC-tank, the impedance generated from the ESD protection devices can be isolated from the input node of RF LNA at the operation frequency, so the power gain loss and noise figure of RF LNA can be successfully codesigned with the desired ESD robustness. The proposed ESD protection circuit with novel impedance-isolation technique will be one of the most effective ESD protection solutions for RF circuits in higher frequency band (>10GHz).

Original languageEnglish
Title of host publication2003 Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2003
PublisherESD Association
ISBN (Electronic)1585370576, 9781585370573
StatePublished - 1 Jan 2003
Event25th Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2003 - Las Vegas, United States
Duration: 21 Sep 200325 Sep 2003

Publication series

NameElectrical Overstress/Electrostatic Discharge Symposium Proceedings
Volume2003-January
ISSN (Print)0739-5159

Conference

Conference25th Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2003
CountryUnited States
CityLas Vegas
Period21/09/0325/09/03

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