ESD protection design by using only 1×VDD low-voltage devices for mixed-voltage I/O buffers with 3×VDD input tolerance

Ming-Dou Ker*, Chang Tzu Wang

*Corresponding author for this work

Research output: Contribution to conferencePaper

6 Scopus citations

Abstract

A new electrostatic discharge (ESD) protection design by using only 1×VDD low-voltage devices for mixed-voltage I/O buffer with 3×VDD input tolerance is proposed. A special ESD detection circuit has been proposed to improve ESD protection efficiency of ESD clamp device by substrate-triggered technique to achieve high ESD level. This design has been successfully verified in a 0.13-μm CMOS process to provide an excellent circuit solution for on-chip ESD protection in the mixed-voltage I/O buffers with 3×VDD input tolerance.

Original languageEnglish
Pages287-290
Number of pages4
DOIs
StatePublished - 1 Dec 2006
Event2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006 - Hangzhou, China
Duration: 13 Nov 200615 Nov 2006

Conference

Conference2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006
CountryChina
CityHangzhou
Period13/11/0615/11/06

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    Ker, M-D., & Wang, C. T. (2006). ESD protection design by using only 1×VDD low-voltage devices for mixed-voltage I/O buffers with 3×VDD input tolerance. 287-290. Paper presented at 2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006, Hangzhou, China. https://doi.org/10.1109/ASSCC.2006.357907