The second breakdown current (It2) and ESD level of NMOS devices and diodes with different ESD implantations for on-chip ESD protection were verified in a 0.18-μm salicide bulk CMOS technology. The significant improvement was observed when the NMOS is fabricated with boron or arsenic ESD implantations.
|Number of pages||6|
|State||Published - 1 Jan 2001|
|Event||8th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA 2001) - Singapure, Singapore|
Duration: 9 Jul 2001 → 13 Jul 2001
|Conference||8th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA 2001)|
|Period||9/07/01 → 13/07/01|