TY - GEN
T1 - Error resilient hybrid variable length codec with tough error synchronization for wireless image transmission
AU - Lee, Yew San
AU - Yu, Cheng Mou
AU - Lee, Chen-Yi
PY - 2001/12/1
Y1 - 2001/12/1
N2 - Variable-length codes, also called Huffman code, is the most popular data compression technique used for solving channel bandwidth bottleneck in many image compression standards such as JPEG, MPEG-2, and H263. But, it is vulnerable to loss of synchronization if they are transmitted consecutively through a noisy channel. It will result in large drops in image quality. Previously, we have proposed a novel HVLC coding scheme, which exhibits high synchronization, error correction capability and low redundancy. Simulation results show that it can achieve high signal-to-noise ratio (PSNR=28 dB) compared to existed VLC schemes at bit error rate (BER) of 10/sup -3/ environment. Here, we present HVLC codec system. It can support up to 256-entry 12-bit symbol table. The codec system provides advanced options and fully programmable for pixel-based and DCT-based image coding algorithm. Based on 0.35 um CMOS SPQM technology, the codec system occupies a silicon area of 3400 um/spl times/3400 um and consists of 88,000 gate count. It can operate at 3 V power supply and yields high encoding/decoding rate of 133 M-Symbol/sec for real time application requirement.
AB - Variable-length codes, also called Huffman code, is the most popular data compression technique used for solving channel bandwidth bottleneck in many image compression standards such as JPEG, MPEG-2, and H263. But, it is vulnerable to loss of synchronization if they are transmitted consecutively through a noisy channel. It will result in large drops in image quality. Previously, we have proposed a novel HVLC coding scheme, which exhibits high synchronization, error correction capability and low redundancy. Simulation results show that it can achieve high signal-to-noise ratio (PSNR=28 dB) compared to existed VLC schemes at bit error rate (BER) of 10/sup -3/ environment. Here, we present HVLC codec system. It can support up to 256-entry 12-bit symbol table. The codec system provides advanced options and fully programmable for pixel-based and DCT-based image coding algorithm. Based on 0.35 um CMOS SPQM technology, the codec system occupies a silicon area of 3400 um/spl times/3400 um and consists of 88,000 gate count. It can operate at 3 V power supply and yields high encoding/decoding rate of 133 M-Symbol/sec for real time application requirement.
UR - http://www.scopus.com/inward/record.url?scp=84888044981&partnerID=8YFLogxK
U2 - 10.1109/ISCAS.2001.922238
DO - 10.1109/ISCAS.2001.922238
M3 - Conference contribution
AN - SCOPUS:84888044981
SN - 0780366859
SN - 9780780366855
T3 - ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings
SP - 326
EP - 329
BT - ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings
Y2 - 6 May 2001 through 9 May 2001
ER -