Enhancement of PMOS device performance with Poly-SiGe gate

Wen Chin Lee, Bryan Watson, Tsu Jae King, Chen-Ming Hu

Research output: Contribution to journalArticlepeer-review

27 Scopus citations

Abstract

Poly-Si and poly-Si0.75Ge0.25-gated PMOS transistors with a very thin gate oxide of 29 angstrom were fabricated. In addition to reduce gate-depletion effect (GDE) and reduced boron penetration, more favorable Id-Vd characteristics were observed for the poly-SiGe-gated transistors than poly-Si-gated transistors. This and the underlying superior hole mobility are explained with a universal mobility model based on Vg, Tox, Vth, and Vfb. Both reduced GDE and superior hole mobility contribute to the enhanced performance.

Original languageEnglish
Pages (from-to)232-234
Number of pages3
JournalIEEE Electron Device Letters
Volume20
Issue number5
DOIs
StatePublished - 1 May 1999

Fingerprint Dive into the research topics of 'Enhancement of PMOS device performance with Poly-SiGe gate'. Together they form a unique fingerprint.

Cite this