Enhanced substrate current in SOI MOSFETs

Pin Su*, Ken Ichi Goto, Toshihiro Sugii, Chen-Ming Hu

*Corresponding author for this work

Research output: Contribution to journalLetterpeer-review

17 Scopus citations


This letter reports an enhanced current at high gate bias in SOI MOSFETs. A comparison between coprocessed bulk and partially depleted SOI MOSFETs is used to present the enhancement unique to SOI devices and demonstrate the underlying mechanism. Other than electric field, a new source for carrier heating in the channel, i.e., self-lattice heating, is found to be responsible for the excess substrate current observed. The impact of this phenomenon on SOI device lifetime prediction and compact modeling under dynamic operating conditions typical of digital circuit operation is described. This SOI-specific enhancement must be considered in one-to-one comparisons between bulk and SOI MOSFETs regarding hot-carrier effects.

Original languageEnglish
Pages (from-to)282-284
Number of pages3
JournalIEEE Electron Device Letters
Issue number5
StatePublished - 1 May 2002


  • Hot carrier
  • Impact ionization
  • Self-heating
  • Silicon-on-insulator (SOI)
  • Substrate current

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