Energy/power estimation for LDPC decoders in software radio systems

Chia-Han Lee*, Wayne Wolf

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

Low-density parity-check (LDPC) codes are advanced error-correcting codes with performance approaching the Shannon limit. Although many LDPC code decoding algorithms have been proposed, no detailed comparison in energy/power consumption had ever been reported. This paper presents the performance and energy/power consumption trade-off for different LDPC decoding algorithms and proposes an efficient method to estimate energy consumption. We also propose a joint power management scheme for transmitter and receiver to save receiver energy while maintaining same communication quality by properly delivering more transmit power.

Original languageEnglish
Title of host publicationSiPS 2005
Subtitle of host publicationIEEE Workshop on Signal Processing Systems - Design and Implementation, Proceedings
Pages48-53
Number of pages6
DOIs
StatePublished - 1 Dec 2005
EventSiPS 2005: IEEE Workshop on Signal Processing Systems - Design and Implementation - Athens, Greece
Duration: 2 Nov 20054 Nov 2005

Publication series

NameIEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation
Volume2005
ISSN (Print)1520-6130

Conference

ConferenceSiPS 2005: IEEE Workshop on Signal Processing Systems - Design and Implementation
CountryGreece
CityAthens
Period2/11/054/11/05

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